Imec has demo-ed 3D stacked FinFETs on 300mm wafers using a sequential integration approach with a 45nm fin pitch and 110nm poly pitch technology. The top layer consists of junction-less devices fabricated at a temperature below 525 degrees Celsius in a silicon layer transferred by wafer-to-wafer bonding. The excellent performance of the resulting stack demonstrates ...
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from Electronics Weekly https://www.electronicsweekly.com/news/business/imec-demo-es-3d-stacked-finfets-2018-12/
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