Cadence Design Systems has announced its work with TSMC in 5nm and 7nm+ FinFET chip design for mobile devices. Cadence said its digital, sign-off and custom/analogue tools have achieved the latest Design Rule Manual (DRM) and SPICE certification for the silicon foundry’s 5nm and 7nm+ processes. Cadence will presents details of the work with TSMC ...
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from Electronics Weekly https://www.electronicsweekly.com/news/cadence-sign-off-tsmc-5nm-7nm-finfets-2018-05/
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