JTAG Technologies and Altium have combined to offer the circuit board designer the capability to assess the JTAG/boundary-scan testing resources on their design before committing to layout. Called JTAG Maps it is available as a free extension for the Altium Designer tool. Boundary-scan device models (BSDLs) are used for JTAG/boundary-scan testing as they indicate which ...
Read full article: JTAG Tech and Altium map boundary scan devices
from Electronics Weekly http://www.electronicsweekly.com/news/jtag-tech-altium-map-boundary-scan-devices-2016-11/
No comments:
Post a Comment