Imec has demo-ed a silicon-passivated germanium nMOS gate stack with dramatically reduced interface defect density (DIT) reaching the same level as a Si gate stack and with high mobility and reduced positive bias temperature instability (PBTI). This paves the way to Ge-based finFETs and gate all-around devices, as promising options for 5nm and beyond logic ...
Read full article: Imec shows Si-passivated Ge NMOS gate stack
from Electronics Weekly http://www.electronicsweekly.com/news/business/imec-shows-si-passivated-ge-nmos-gate-stack-2016-12/
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