TSMC has announced delivery of the complete version of its 5nm design infrastructure within the Open Innovation Platform (OIP). The release enables 5nm SoC designs in next-generation advanced mobile and high-performance computing (HPC) applications, targeting high-growth 5G and artificial intelligence markets. Leading Electronic Design Automation (EDA) and IP vendors collaborated with TSMC to develop and ...
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from Electronics Weekly https://www.electronicsweekly.com/news/business/tsmc-releases-5nm-design-infrastructure-2019-04/
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