The Agency for Science, Technology and Research’s (A*STAR) Institute of Microelectronics (IME) and Soitec are to develop and integrate a new layer transfer process within advanced wafer level multi-chip packaging techniques. Based on the combination of IME’s Fan-Out Wafer Level Packaging (FOWLP) and 2.5D Through Silicon Interposer (TSI) technologies with Soitec’s Smart Cut technology, the ...
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from Electronics Weekly https://www.electronicsweekly.com/news/business/astar-soitec-combine-packaging-development-2019-03/
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