High-performance chips can be designed to fail early, or can be physically attacked using high workloads, according to Washington State University, whose research team damaged an on-chip comms network by deliberately adding malicious workload. Led by engineers Partha Pande (left) and Janardhan Rao Doppa, the team has been exploring chip vulnerabilities as a way to prevent malicious ...
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from Electronics Weekly https://www.electronicsweekly.com/news/research-news/chip-makers-can-design-failure-2018-12/
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